AMD EPYC 9006 Venice Announced & Looks Poised To Be A Grand Slam - Phoronix

What the report says

Phoronix reports that AMD has formally announced its EPYC 9006 “Venice” server processor family at AMD Advancing AI 2026, positioning it as the successor to the EPYC 9005 “Turin” line. The article, written by Michael Larabel and dated July 23, says Venice is already in production, though detailed SKU tables were not provided during briefings and EPYC 9006 SP7 availability is expected in the fourth quarter, making the announcement closer to a soft launch for some buyers.

According to Phoronix, the Venice platform adds support for DDR5-8000 and Gen2 MRDIMM-12800 memory, with up to 16 memory channels per socket. The chips also bring PCIe Gen 6 support, with up to 160 lanes in a dual-socket setup. AMD is said to be claiming about 20% higher per-core performance, up to 256 cores and 512 threads per socket with Zen 6C, and a maximum 5.0GHz frequency for a 96-core processor.

Phoronix frames these specifications as significant because memory bandwidth and select AI acceleration features have been among Intel Xeon 6 Granite Rapids’ competitive advantages. The report notes that Venice does not support Intel-style AMX instructions, but does improve AMD’s AVX-512 capabilities with AVX-512 BMM, which Phoronix says it plans to benchmark with current compilers.

The publication also notes several variants: EPYC 9006 SP7, EPYC 9006 SP8 for more value-focused servers, EPYC 9006X SP7 “Venice-X” with 3D V-Cache planned for 2027, and EPYC 9006 LP “Verano” with LPDDR memory expected in the second half of 2027. Independent benchmark results are still pending.